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[VHDL-FPGA-Verilog] memtest

Description: 在数字系统中，一般存在多个芯片，利用不同的特点用于实现不同的功能，一般都包含CPU,FPGA,AD,DA,memory，ASSP（专用标准模块）,ASIC等。CPU用于进行智能控制，FPGA进行硬件算法处理和多设备接口，AD进行模数转换，DA进行数模转换，memory存储临时数据。因此，FPGA如何与其他芯片进行通讯是重要的设计内容。数据输入，数据输出，双向通讯，指令传递，地址管理，不同时钟的异步通讯问题等等都需要处理。最基本的MEMORY如SRAM(128KX8bbit静态存储器628128)涉及到其中的输入，输出，双向通讯，地址管理问题，具有很强的代表性。在同步数字系统中更大量用到FIFO,SDRAM等等。其中FIFO使用方便简单，用处很广。在QUARTUSII软件库中，就有各种FPGA片内MEMORY供使用。但是FPGA的片内MEMORY容量太有限，因此外部MEMORY也是经常需要的。因此，本程序让大家学习控制芯片内外的MEMORY,为与其他智能设备的通讯学习打下基础。-In the digital system, generally there are several chips, the use of different features used to implement different functions, generally includes CPU, FPGA, AD, DA, memory, ASSP (application specific standard module), ASIC and so on. CPU is used for intelligent control, FPGA hardware algorithm processing and multi-device interface, AD to ADC, DA for digital-analog conversion, memory to store temporary data. Therefore, FPGA how to communicate with other chips are important design elements. Data input, data output, two-way communication, instruction delivery, address management, different clock asynchronous communication problems, and so have to deal with. If the most basic MEMORY SRAM (128KX8bbit static memory 628 128) which involved the input, output, bi-directional communication, address management issues, with strong representation. In synchronous digital systems a lot more use FIFO, SDRAM, etc.. One simple and easy to use FIFO, use very broad. In QUARTUSII software library, there ar
Platform: | Size: 223232 | Author: 平凡 | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_CCD_inverse

Description: DE2版自带的CCD驱动，将图像存储于SDRAM中-DE2 version comes with the CCD driver in the image stored in SDRAM
Platform: | Size: 3843072 | Author: 李博霖 | Hits:

[VHDL-FPGA-Verilog] sdram_ctrl.tar

Description: sdram controller VHDL source code
Platform: | Size: 90112 | Author: datonglii | Hits:

[Software Engineering] ddr_sdr_V1_1

Description: its the vhdl stuff for ddr sdram controller nice one easily understandable-its the vhdl stuff for ddr sdram controller nice one easily understandable
Platform: | Size: 37888 | Author: james | Hits:

[VHDL-FPGA-Verilog] sdramc_vhdl

Description: Xilinx提供的SDRAM控制器参考设计（VHDL)-SDRAM controller reference design (VHDL) designed by Xilinx
Platform: | Size: 1230848 | Author: charlie | Hits:

[VHDL-FPGA-Verilog] SDRAMcontrol

Description: 用VHDL编写的SDRAM控制器，能实现SDRAM的读写控制及片选。-Prepared using VHDL SDRAM controller, able to SDRAM read and write control and chip select.
Platform: | Size: 1031168 | Author: 曾强 | Hits:

[Video Capture] CCD

Description: 本设计主要用来进行图像采集处理，通过摄像头采集图像信息，经过插值算法后存储到外部SDRAM，然后读取图像数据，进行边缘滤波处理后经VGA输出到屏幕上。-This design is mainly used for image acquisition and processing,through the camera capture image information,after interpolation to the external memory after the SDRAM,and then read the image data processed by the edge filter VGA output to the screen.
Platform: | Size: 12288 | Author: 申永帅 | Hits:

[VHDL-FPGA-Verilog] ddr

Description: DDR SDRAM 控制器 VHDL代码，可支持32bits数据总线-VHDL code for DDR SDRAM controller, supporting 32bits data bus
Platform: | Size: 9216 | Author: chen | Hits:

[VHDL-FPGA-Verilog] DDRSDRAMconclude

Description: DDR SDRAM技术总结 介绍DDR SDRAM的一些概念和难点 着重讲解主流DDRII的技术 最后结合硬件设计提出一些参考 -DDR SDRAM DDR SDRAM Technical Summary describes some of the concepts and difficult to explain the mainstream DDRII technology focused on the final hardware design combined with some reference
Platform: | Size: 2262016 | Author: 董萌 | Hits:

[VHDL-FPGA-Verilog] mt48lc4m16a2

Description: 模拟micron的sdram的 VHDL 代码，用于验证自己的sdram控制器。-Micron sdram the VHDL simulation of the code used to validate their sdram controller.
Platform: | Size: 9216 | Author: li | Hits:

[VHDL-FPGA-Verilog] sram

Description: sram操作vhdl源程序，内有sdram模型，控制器设计，及测试源程序-sram operating in vhdl \doc DDR SDRAM reference design documentation \model Contains the vhdl SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation Contains the vhdl testbench, modelsim project file, and library \source Contains the vhdl source files for the DDR SDRAM reference design \synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
Platform: | Size: 897024 | Author: chen | Hits:

[VHDL-FPGA-Verilog] X-HDL

Description: 一款可以在verilog和VHDL之间互换的工具，经测试，暂无bug-A verilog and VHDL can be exchanged between the tools, tested, no bug
Platform: | Size: 3962880 | Author: 邵文熙 | Hits:

[VHDL-FPGA-Verilog] RED--PCI-5.0

Description: 使用PCI9054作为接口芯片，通过FPGA实现PCI9054，SDRAM和AD之间的连接，本程序是以此为目的编写的.-PCI9054 interface chip used as a through FPGA implementation PCI9054, SDRAM, and the connection between AD, the program is prepared for this purpose.
Platform: | Size: 3389440 | Author: 黄宸懿 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: sdram，在fpga数据传递领域应用广泛，乒乓操作，不同频域的数据传递，都靠sdram来转换。-SDRAM VHDL FPGA FIFO
Platform: | Size: 2058240 | Author: 梁 | Hits:

[VHDL-FPGA-Verilog] source

Description: SDRAM控制器源代码，是ALTERA公司的IP源核，很好很强大-SDRAM controller source code, very very strong
Platform: | Size: 11264 | Author: 张理 | Hits:

[VHDL-FPGA-Verilog] SDR_SDRAM_IP

Description: SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
Platform: | Size: 2360320 | Author: peteryu010 | Hits:

[VHDL-FPGA-Verilog] model

Description: 用vhdl写的 ddr sdram 控制器,数据位可以修改。在quartus2下仿真通过-With written ddr sdram controller vhdl
Platform: | Size: 7168 | Author: momowang | Hits:

[VHDL-FPGA-Verilog] sdr-sdram-controller-source-code

Description: altera 公司sdr sdram 控制器源码，是VHDL的，大家选择下载-The altera sdr sdram controller source, the VHDL, we choose to download
Platform: | Size: 16384 | Author: 梦殇 | Hits:

[Windows Develop] DDR-SDRAM

Description: ddr sdram 控制器的源代码，内有vhdl和verilog。-DDR SDRAM controller
Platform: | Size: 903168 | Author: 何海山 | Hits:

[VHDL-FPGA-Verilog] sdram-control

Description: 基于FPGA的SDRAM读写控制程序，由VHDL语言编写-FPGA-based SDRAM read and write control program, by the VHDL language
Platform: | Size: 9216 | Author: lijiaxi | Hits:
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